Bachelor of Technology (B.Tech)/Bachelor of Engineering (B.E.) mandatoryCompulsory
Master of Science (M.Sc.)/ Master of Technology (M.Tech.) preferred
Minimum 2 years of experience as Embedded / VLSI / ASIC / Chip Design mandatoryCompulsory
Candidates with 2 to 15 years of experience in Analog Layout Design can applyCompulsory
Experience in Other preferred
23 - 40 yrsCompulsory
Fluent English skills. Ability to Speak.Compulsory
Salary will be calculated as years of experience*3Compulsory
He/She should be able to act as focal point with customers, work and lead a team of 3-4 custom layout engineers on analog layout, physical verification, maintaining PDKs, ealuating them. The candidates should have a strong expertise in some critical layouts such as PLL, DLL, LNA, VGA, ADC, LDO. He/She should be able to adapt to new technologies/tools/flows pretty quickly.
Expertise in Custom Layout Standard Cells, I/O or special analog designs such as RF transceivers, LNA, VGA, PLL, DLL, LDO, Bandgap, VCO, ADC,DAC.
Strong Layout Design Concepts.
Experience in Pcell development, maintaining and modifying PDKs.
Experience in Layout Design tools such as Virtuoso, Virtuoso-XL.
Expertise in SKILL Programming Language.
Experience in Physical verification.
Exposure to Calibre, Hercules and Assura.
Exposure to digital place & route.
Should be able to mentor layout engineers and act as focal point with customers.
Good understanding of Analog Design.
Strong basics in process technology, fabrication techniques.
Good written and oral communication skills. Ability to clearly document plans.
Ability to interface with different teams and prioritize work based on project needs.